Interactive Storyline Scenario
Branching scenario with decision-driven outcomes and accessibility features.
Open Storyline Sample →About Me
I’m a technical learning and development leader who designs and builds accessible, SCORM/xAPI-compliant training for cloud, data, and engineering teams. I specialize in turning complex systems—regulatory workflows, AI/ML concepts, and silicon program execution—into clean, interactive Storyline and Rise experiences that work on real-world LMS/LXP platforms.
My portfolio blends federal compliance microlearning, end-to-end ADDIE storyboards, and silicon TPM case studies (AMD/NVIDIA-style) to demonstrate how I connect architecture, execution, and learner experience in one narrative.
Core Skills
- Articulate Storyline & Rise 360 (scenario-based, accessible builds)
- Compliance microlearning & ADDIE storyboards (code of conduct, risk)
- SCORM / xAPI packaging & LMS/LXP implementation (Moodle, Cornerstone)
- Technical L&D for cloud, AI/ML, and engineering teams
- Learning analytics, dashboards, and iteration on performance outcomes
- Silicon TPM case studies (architecture, IP integration, verification readiness)
- WCAG 2.1 / Section 508 accessibility and inclusive design
- Stakeholder & SME partnership; virtual facilitation (Zoom, Teams)
Project Samples
Rise Microlearning Module
Responsive micro-course suitable for mobile and desktop learners.
Open Rise Sample →Documents
Downloadable design artifacts demonstrating instructional strategy, ADDIE methodology, and compliance-focused microlearning design.
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Compliance Microlearning — ADDIE Storyboard
Storyboard + assessment blueprint covering vendor gifts, confidentiality, and accurate time reporting.
View Storyboard PDF →eLearning Portfolio (PDF)
One-page portfolio summary showing Storyline, Rise, and ADDIE design work.
Download Portfolio PDF →Case Studies
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Industry-aligned TPM and eLearning scenarios demonstrating system design, compliance workflows, and technical coordination across architecture, engineering, and execution teams.
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Silicon TPM – AMD Architecture & Verification Alignment
A full case study simulating cross-functional execution in an AMD-style SoC architecture and verification program, including governance, risk management, and G2/G3 gating.
Open AMD Case Study →Silicon TPM – NVIDIA GPU/Accelerator SoC Variant
A complementary case study reflecting NVIDIA GPU & Accelerator workflows—IP integration, coverage analysis, performance alignment, and tape-out readiness.
Download NVIDIA Version (PDF) →